Vulnerability Description
Improper mstatus.SUM bit retention (non-zero) in Open-Source RISC-V Processor commit f517abb violates privileged spec constraints, enabling potential physical memory access attacks.
CVSS Score
9.1
CRITICAL
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:H/I:N/A:H
Related Weaknesses (CWE)
References
- https://github.com/chipsalliance/rocket-chip.git
- https://github.com/heyfenny/Vulnerability_disclosure/blob/main/RISCV/Rocket-chip
- https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154769/RISC-V+Technical+
FAQ
What is CVE-2025-45006?
CVE-2025-45006 is a vulnerability with a CVSS score of 9.1 (CRITICAL). Improper mstatus.SUM bit retention (non-zero) in Open-Source RISC-V Processor commit f517abb violates privileged spec constraints, enabling potential physical memory access attacks.
How severe is CVE-2025-45006?
CVE-2025-45006 has been rated CRITICAL with a CVSS base score of 9.1/10. This is considered a critical vulnerability requiring immediate attention.
Is there a patch for CVE-2025-45006?
Check the references section above for vendor advisories and patch information. Review vendor security bulletins for remediation guidance.