Vulnerability Description
A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability.
CVSS Score
MEDIUM
Affected Products
| Vendor | Product | Versions |
|---|---|---|
| Chipsalliance | Rocketchip | <= 1.6 |
Related Weaknesses (CWE)
References
- https://github.com/107040503/RISC-V-Vulnerability-Disclosure_SRETExploitThird Party Advisory
- https://github.com/chipsalliance/rocket-chip.gitProduct
FAQ
What is CVE-2025-63384?
CVE-2025-63384 is a vulnerability with a CVSS score of 6.5 (MEDIUM). A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privileg...
How severe is CVE-2025-63384?
CVE-2025-63384 has been rated MEDIUM with a CVSS base score of 6.5/10. Review the CVSS metrics above for detailed severity breakdown.
Is there a patch for CVE-2025-63384?
Check the references section above for vendor advisories and patch information. Affected products include: Chipsalliance Rocketchip.