CWE-1209: Failure to Disable Reserved Bits

Description

The reserved bits in a hardware design are not disabled prior to production. Typically, reserved bits are used for future capabilities and should not support any functional logic in the design. However, designers might covertly use these bits to debug or further develop new capabilities in production hardware. Adversaries with access to these bits will write to them in hopes of compromising hardware state.

Reserved bits are labeled as such so they can be allocated for a later purpose. They are not to do anything in the current design. However, designers might want to use these bits to debug or control/configure a future capability to help minimize time to market (TTM). If the logic being controlled by these bits is still enabled in production, an adversary could use the logic to induce unwanted/unsupported behavior in the hardware.

Potential Impact

Confidentiality, Integrity, Availability, Access Control, Accountability, Authentication, Authorization, Non-Repudiation

Varies by Context

Demonstrative Examples

Assume a hardware Intellectual Property (IP) has address space 0x0-0x0F for its configuration registers, with the last one labeled reserved (i.e. 0x0F).  Therefore inside the Finite State Machine (FSM), the code is as follows:

Bad

reg gpio_out = 0;  //gpio should remain low for normal operation
                      
                      case (register_address)
		      
                        4'b1111 : //0x0F
			
			  begin
			  
                            gpio_out = 1;
			  
			  end

Good

reg gpio_out = 0;  //gpio should remain low for normal operation
			  
                  	  case (register_address)
			  
                  	    //4'b1111 : //0x0F
                  	    default: gpio_out = gpio_out;

Mitigations & Prevention

Architecture and DesignImplementation

Include a feature to disable reserved bits.

Integration

Any writes to these reserve bits are blocked (e.g., ignored, access-protected, etc.), or an exception can be asserted.

Frequently Asked Questions

What is CWE-1209?

CWE-1209 (Failure to Disable Reserved Bits) is a software weakness identified by MITRE's Common Weakness Enumeration. It is classified as a Base-level weakness. The reserved bits in a hardware design are not disabled prior to production. Typically, reserved bits are used for future capabilities and should not support any functional logic in the design. Howe...

How can CWE-1209 be exploited?

Attackers can exploit CWE-1209 (Failure to Disable Reserved Bits) to varies by context. This weakness is typically introduced during the Architecture and Design, Implementation, Documentation phase of software development.

How do I prevent CWE-1209?

Key mitigations include: Include a feature to disable reserved bits.

What is the severity of CWE-1209?

CWE-1209 is classified as a Base-level weakness (Medium abstraction). Its actual severity depends on the specific context and how the weakness manifests in your application.