CWE-1246: Improper Write Handling in Limited-write Non-Volatile Memories

Description

The product does not implement or incorrectly implements wear leveling operations in limited-write non-volatile memories.

Non-volatile memories such as NAND Flash, EEPROM, etc. have individually erasable segments, each of which can be put through a limited number of program/erase or write cycles. For example, the device can only endure a limited number of writes, after which the device becomes unreliable. In order to wear out the cells in a uniform manner, non-volatile memory and storage products based on the above-mentioned technologies implement a technique called wear leveling. Once a set threshold is reached, wear leveling maps writes of a logical block to a different physical block. This prevents a single physical block from prematurely failing due to a high concentration of writes.

Potential Impact

Availability

DoS: Instability

Demonstrative Examples

An attacker can render a memory line unusable by repeatedly causing a write to the memory line.

Below is example code from [REF-1058] that the user can execute repeatedly to cause line failure. W is the maximum associativity of any cache in the system; S is the size of the largest cache in the system.

Attack

// Do aligned alloc of (W+1) arrays each of size S
					while(1) {
					
					  for (ii = 0; ii < W + 1; ii++)
					  
					    array[ii].element[0]++;
					  
					
					}

Without wear leveling, the above attack will be successful. Simple randomization of blocks will not suffice as instead of the original physical block, the randomized physical block will be worn out.

Good

Wear leveling must be used to even out writes to the device.

Mitigations & Prevention

Architecture and DesignImplementationTesting High

Include secure wear leveling algorithms and ensure they may not be bypassed.

Taxonomy Mappings

ISA/IEC 62443: Part 4-1 — Req SD-4
ISA/IEC 62443: Part 4-1 — Req SI-1
ISA/IEC 62443: Part 4-1 — Req SVV-3

Frequently Asked Questions

What is CWE-1246?

CWE-1246 (Improper Write Handling in Limited-write Non-Volatile Memories) is a software weakness identified by MITRE's Common Weakness Enumeration. It is classified as a Base-level weakness. The product does not implement or incorrectly implements wear leveling operations in limited-write non-volatile memories.

How can CWE-1246 be exploited?

Attackers can exploit CWE-1246 (Improper Write Handling in Limited-write Non-Volatile Memories) to dos: instability. This weakness is typically introduced during the Architecture and Design, Implementation phase of software development.

How do I prevent CWE-1246?

Key mitigations include: Include secure wear leveling algorithms and ensure they may not be bypassed.

What is the severity of CWE-1246?

CWE-1246 is classified as a Base-level weakness (Medium abstraction). Its actual severity depends on the specific context and how the weakness manifests in your application.