Base · Medium

CWE-1280: Access Control Check Implemented After Asset is Accessed

A product's hardware-based access control check occurs after the asset has been accessed.

CWE-1280 · Base Level ·1 Mitigations

Description

A product's hardware-based access control check occurs after the asset has been accessed.

The product implements a hardware-based access control check. The asset should be accessible only after the check is successful. If, however, this operation is not atomic and the asset is accessed before the check is complete, the security of the system may be compromised.

Potential Impact

Access Control, Confidentiality, Integrity

Modify Memory, Read Memory, Modify Application Data, Read Application Data, Gain Privileges or Assume Identity, Bypass Protection Mechanism

Demonstrative Examples

Assume that the module foo_bar implements a protected register. The register content is the asset. Only transactions made by user id (indicated by signal usr_id) 0x4 are allowed to modify the register contents. The signal grant_access is used to provide access.
Bad
module foo_bar(data_out, usr_id, data_in, clk, rst_n);
       			      output reg [7:0] data_out;
       			      input wire [2:0] usr_id;
       			      input wire [7:0] data_in; 
       			      input wire clk, rst_n;
       			      wire grant_access;
       			      always @ (posedge clk or negedge rst_n)
       			      begin
       			      
				if (!rst_n)
				
				  data_out = 0;
				
				else
				
				  data_out = (grant_access) ? data_in : data_out;
				  assign grant_access = (usr_id == 3'h4) ? 1'b1 : 1'b0;
				
			      
			      end
			      endmodule
This code uses Verilog blocking assignments for data_out and grant_access. Therefore, these assignments happen sequentially (i.e., data_out is updated to new value first, and grant_access is updated the next cycle) and not in parallel. Therefore, the asset data_out is allowed to be modified even before the access control check is complete and grant_access signal is set. Since grant_access does not have a reset value, it will be meta-stable and will randomly go to either 0 or 1.
Flipping the order of the assignment of data_out and grant_access should solve the problem. The correct snippet of code is shown below.
Good
always @ (posedge clk or negedge rst_n)
       			      begin
			      
				if (!rst_n)
				
				  data_out = 0;
				
				else
				
				  assign grant_access = (usr_id == 3'h4) ? 1'b1 : 1'b0;
				  data_out = (grant_access) ? data_in : data_out;
				
			      
			      end
       			      endmodule

Mitigations & Prevention

Implementation

Implement the access control check first. Access should only be given to asset if agent is authorized.

Frequently Asked Questions

What is CWE-1280?

CWE-1280 (Access Control Check Implemented After Asset is Accessed) is a software weakness identified by MITRE's Common Weakness Enumeration. It is classified as a Base-level weakness. A product's hardware-based access control check occurs after the asset has been accessed.

How can CWE-1280 be exploited?

Attackers can exploit CWE-1280 (Access Control Check Implemented After Asset is Accessed) to modify memory, read memory, modify application data, read application data, gain privileges or assume identity, bypass protection mechanism. This weakness is typically introduced during the Implementation phase of software development.

How do I prevent CWE-1280?

Key mitigations include: Implement the access control check first. Access should only be given to asset if agent is authorized.

What is the severity of CWE-1280?

CWE-1280 is classified as a Base-level weakness (Medium abstraction). Its actual severity depends on the specific context and how the weakness manifests in your application.